Active matrix electro-luminescent display with an organic leveling layer

ABSTRACT

A resin material having a small relative dielectric constant is used as a layer insulation film  114.  The resin material has a flat surface. A black matrix or masking film for thin film transistors is formed thereon using a metal material. Such a configuration prevents the problem of a capacity generated between the masking film and a thin film transistor.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is a continuation of U.S. application Ser. No.09/414,906, filed Oct. 8, 1999, which is a continuation of U.S.application Ser. No. 09/360,341, filed Jul. 22, 1999, now U.S. Pat. No.6,169,293, which is a continuation of U.S. application Ser. No.08/751,338, filed Nov. 18, 1996, now U.S. Pat. No. 5,952,708.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates to a configuration applicable toflat panel displays represented by active matrix liquid crystal displaysand EL type displays.

[0004] 2. Description of Related Art

[0005] Conventional known flat panel displays include active matrixliquid crystal displays having a configuration wherein a thin filmtransistor for switching is provided to each of a number of pixelsprovided in the form of a matrix and wherein charge going in and outeach pixel electrode is controlled by the thin film transistor.

[0006] In such a configuration, a masking means (a light shieldingmeans) must be provided to prevent light from entering the thin filmtransistors provided in a pixel region.

[0007] A metal film is currently chosen as the masking means (the lightshielding means)from the viewpoint of dispersion of impurities andstability. Further, such a masking means for thin film transistors isgenerally provided to serve also as a black matrix which coversperipheral edge regions of pixel electrodes.

[0008] Such a configuration has the following problems. The firstproblem is that a capacity is generated between the masking film and thethin film transistors, and this adversely affects the operation of thethin film transistors. The second problem is that since the masking filmis generally formed on a substrate having irregularity thereon which canmake the masking function insufficient.

[0009] The problem associated with the masking function equally appliesto the black matrix provided so as to overlap with the edges of pixels.

[0010] It is an object of the invention disclosed in this specificationto provide a configuration which solves the problems associated with amasking film for shading thin film transistors to achieve highperformance as an active matrix display.

SUMMARY OF THE INVENTION

[0011] A configuration according to the invention disclosed in thisspecification is characterized in that it comprises:

[0012] thin film transistors having outputs connected to pixelelectrodes;

[0013] a layer insulation film made of a resin material provided on thethin film transistors; and

[0014] a masking film for shading the thin film transistors provided onthe layer insulation film.

[0015] Another configuration according to the present invention ischaracterized in that it comprises:

[0016] a layer insulation film made of a resin material formed on thinfilm transistors; and

[0017] a masking film for shading the thin film transistors formed onthe layer insulation film made of a resin material.

[0018] Still another configuration according to the present invention ischaracterized in that it comprises: a plurality of pixel electrodesprovided in the form of a matrix; and a black matrix for covering atleast a part of peripheral regions of the pixel electrodes, the blackmatrix being provided on a layer insulation film made of a resinmaterial.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019]FIGS. 1A through 1D illustrate steps of producing a pixel portionof an active matrix circuit.

[0020]FIGS. 2A through 2C illustrate steps of producing a pixel portionof an active matrix circuit.

[0021]FIGS. 3A through 3C illustrate steps of producing a pixel portionof an active matrix circuit. FIGS. 4A through 4C illustrate steps ofproducing a pixel portion of an active matrix circuit.

[0022]FIGS. 5A through 5D illustrate steps of producing a pixel portionof an active matrix circuit.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENT

[0023] A first embodiment of the present invention will now bedescribed. FIGS. 1A through 1D and FIGS. 2A through 2C illustrate stepsof producing a pixel portion of an active matrix liquid crystal displayto be described in the present embodiment.

[0024] As shown in FIG. 1A, a silicon oxide film 102 having a thicknessof 3000 Å as a backing film is first formed on a glass substrate 101using a plasma CVD process.

[0025] Next, an amorphous silicon film (not shown) is formed which willlater serve as a starting film made of a thin film semiconductor forforming an active later of a thin film transistor. The amorphous siliconfilm (not shown) is formed to a thickness of 500 Å using a plasma CVDprocess.

[0026] The amorphous silicon film is then crystallized using a heatingprocess or irradiating it with laser beams or using a process which is acombination of the heating process and irradiation with laser beams toobtain a crystalline silicon film (not shown).

[0027] The crystalline silicon film (not shown) is patterned to obtainan active layer 103 of a thin film transistor.

[0028] Next, a plasma CVD process is performed to form a silicon oxidefilm 104 having a thickness of 1000 Å which serves as a gate insulationfilm by covering the active layer 103 as shown in FIG. 1A. Thus, thestate as shown in FIG. 1A is realized.

[0029] Next, an aluminum film (not shown) including 0.1% scandium byweight is formed to a thickness of 4000 Å using a sputtering process.This aluminum film will serves as a gate electrode later.

[0030] After forming the aluminum film, a dense anodic oxide film (notshown) is formed on the surface thereof to a thickness of 100 Å. Thisanodization is carried out by using the aluminum film as an anode in anelectrolyte obtained by neutralizing an ethylene glycol solutionincluding 3% tartaric acid with aqueous ammonia.

[0031] Further, patterning is performed by providing a resist mask (notshown). A gate electrode 105 is formed as a result of the patterning.

[0032] After the formation of the gate electrode 105, anodization iscarried out again with the resist mask (not shown) left in place. Thisanodization is carried out using an aqueous solution including 3% oxalicacid as an electrolyte.

[0033] This anodization selectively takes place only on side faces ofthe gate electrode 105 because of the leftover resist mask (not shown).The anodic oxide film formed in this step has a porous structure.

[0034] Thus, a porous anodic oxide film 106 is formed on the side facesof the gate electrode 105.

[0035] This porous anodic oxide film can be grown to a thickness on theorder of several μm. The size of this growth can be controlled by theduration of the anodization.

[0036] Here, the thickness of the anodic oxide film 106 is 6000 Å.

[0037] Next, anodization is carried out again using an electrolyteobtained by neutralizing an ethylene glycol solution including 3%tartaric acid with aqueous ammonia. In this anodizing step, since theelectrolyte penetrates the porous anodic oxide film 106, a dense anodicoxide film 107 is formed around the gate electrode 105.

[0038] The thickness of this dense anodic oxide film 107 is 500. Theprimary function of this dense anodic oxide film 107 is to cover thesurface of the gate electrode to prevent generation of hillocks andwhiskers in subsequent steps.

[0039] It also has a function of protecting the gate electrode 105 sothat it is not etched at the same time when the porous anodic oxide film106 is removed later.

[0040] It also has a function of contributing to formation of an offsetgate region which is formed later using the porous anodic oxide film 106as a mask.

[0041] Thus, the state as shown in FIG. 1B is realized.

[0042] In this state, impurity ions are implanted. P (phosphorus) ionsare implanted here to obtain an N-channel type thin film transistor.

[0043] When implantation of impurity ions is carried out in the state asshown in FIG. 1B, the impurity ions are selectively implanted in regionsindicated by 108 and 111. That is, the regions 108 and 111 become highdensity impurity regions.

[0044] The impurity ions are not implanted in a region 109 directlyunder the gate electrode 105 because the gate electrode 105 serves as amask. This region 109 serves as a channel formation region.

[0045] The impurity ions are not implanted also in a region indicated by110 because the porous anodic oxide film 105 and the dense anodic oxidefilm 107 serve as a mask. The region indicated by 107 serves as anoffset gate region which functions neither as a source/drain region noras a channel formation region.

[0046] Particularly, the offset gate region has a function of moderatingthe strength of an electric field formed between the channel formationregion and the drain region. The presence of the offset gate regionallows the OFF current value of the thin film transistor to be reducedand suppresses deterioration of the same.

[0047] Thus, the source region indicated by 108, the channel formationregion indicated by 109, the offset gate region indicated by 110 and thedrain region indicated by 111 are formed on a self-alignment basis.

[0048] When the implantation of impurity ions is completed, the porousanodic oxide film 106 is selectively removed. Then, an annealing processis performed by means of irradiation with laser beams. Since laser beamscan be directed to the vicinity of the interface between the highdensity impurity region and the offset gate region, the junction portionwhich has been damaged by the implantation of impurity ions can besufficiently annealed.

[0049] When the state as shown in FIG. 1B is realized, a silicon oxidefilm 112 having a thickness of 2000 is formed as a first layerinsulation film.

[0050] A silicon nitride film or a multi-layer film consisting of asilicon oxide film and a silicon nitride film may be used as this firstlayer insulation film.

[0051] Next, a contact hole is formed in the first layer insulation film112 to form a source electrode 113 which contacts with the source regionof the thin film transistor. Thus, the state as shown in FIG. 1C isrealized.

[0052] Then, a second layer insulation film 114 is formed usingtransparent polyimide resin or acrylic resin. The layer insulation film114 made of a resin material is formed to have a flat surface. Thus, thestate as shown FIG. 1D is realized.

[0053] Next, as shown in FIG. 2A, a chromium film is formed andpatterned into a masking film 115 which serves as a masking film andalso as a black matrix for the thin film transistor

[0054] A material having a relative dielectric constant equal to orsmaller than 3 is chosen as the resin material for forming the secondlayer insulation film 114. The film is to be made as thick as severalμm. A resin material is advantageous for such an application because itdoes not prolong the time required for the production steps even when itis made thick.

[0055] Such a configuration makes it possible to prevent generation of acapacity between the masking film 115 made of chromium and the thin filmtransistor located thereunder.

[0056] Further, the surface of the second layer insulation film 114 canbe easily flattened if it is formed from a resin material. This makes itpossible to prevent leakage of light originating from surfaceirregularity.

[0057] When the state as shown in FIG. 2A is realized, a third layerinsulation film 116 is formed using a resin material, silicon oxidefilm, or silicon nitride film. Here, the same resin material as for thesecond layer insulation film 114 is used for this third layer insulationfilm 116.

[0058] The use of a resin material as the third layer insulation filmadvantageously solves the problem of generation of a capacity between apixel electrode to be formed later and the masking film 115 and flattensthe surface on which the pixel electrode is to be formed.

[0059] Thus, the state as shown in FIG. 2B is realized. Then, a pixelelectrode 117 is formed by forming a contact hole, forming an ITOelectrode which constitutes the pixel electrode, and performingpatterning.

[0060] This completes the configuration as shown in FIG. 2C. In theconfiguration shown in FIG. 2C, the layer insulation film providedbetween the thin film transistor (especially the source electrode 113)and the masking film (and/or black matrix) 115 can be formed to have asmall relative dielectric constant and a large thickness. This makes itpossible to prevent generation of an unnecessary capacity.

[0061] The configuration as described above can be realized because ofthe fact that the formation of a thick resin film is a simple industrialprocess which does not-involve an increase in processing time asdescribed above.

[0062] A second embodiment of the present invention will now bedescribed.

[0063] The present embodiment is characterized in that it employs aconfiguration which is an improvement over the configuration describedin the first embodiment to provide higher reliability.

[0064] As described above, a metal material such as chromium is used forthe masking film and black matrix. From the viewpoint of long termreliability, however, concern exists about dispersion of impurities fromthe metal material and a short-circuit between the metal material andother electrodes or wiring.

[0065] Especially, if there is a pin hole in the layer insulation film116 in the state as shown in FIG. 2C, a problem arises in that ashort-circuit occurs between the masking film 115 (which maysimultaneously serve as a black matrix) and the pixel electrode 117.

[0066] A possible method for eliminating the influence of a pin holepresent in the layer insulation film 116 is to form the layer insulationfilm 116 as a special multi-layer film.

[0067] However, such a method is unfavorable because it can increase thenumber of production steps and manufacturing cost.

[0068] A configuration according to the present embodiment addressesthis situation by employing a material which can be anodized for themasking film for shading the thin film transistor and by forming ananodic oxide film thereon in the configuration described in the firstembodiment.

[0069] Aluminum or tantalum may be used as the material which can beanodized.

[0070] Especially, the use of aluminum will provide a preferable maskingfilm because it allows the anodic oxide film to be colored in black or asimilar dark color utilizing an anodizing technique used for industrialproducts such as aluminum sashes.

[0071]FIGS. 3A through 3C schematically show production steps accordingto the present embodiment. First, the state as shown in FIG. 1D isrealized by the steps shown in FIGS. 1A through 1D. Then, a masking film115 is formed as shown in FIG. 2A.

[0072] Here, aluminum is used as the masking film 115. Anodization isperformed in an electrolyte to form an anodic oxide film 301 on thesurface of the masking film 115 as shown in FIG. 3A.

[0073]FIG. 3A shows the masking film 301 as a masking film for shading athin film transistor. However, it is normally extended further to alsoform a black matrix.

[0074] When the state as shown in FIG. 3A is realized, a third layerinsulation film 116 is formed by a silicon oxide film or silicon nitridefilm or formed from a resin material as shown in FIG. 3B.

[0075] Further, a pixel electrode 117 is formed using ITO as shown inFIG. 3C.

[0076] Even if a pin hole exists in the layer insulation film 116, thepresence of the anodic oxide film 301 prevents the pixel electrode 117and masking film 115 from being short-circuited.

[0077] In addition, since the anodic oxide film 301 is chemicallystable, it is preferable from the viewpoint of long term reliability inthat it can prevent impurities in the masking film 115 from beingdispersed in the neighborhood thereof.

[0078] A third embodiment of the present invention will now bedescribed.

[0079] The present embodiment relates to a configuration in which anaperture ratio of a pixel is improved. There is a general need for aconfiguration of a pixel that makes the aperture ratio as large aspossible. In order to obtain a large aperture ratio of a pixel, thepixel electrode must be provided to have an area which is as wide aspossible.

[0080] However, a severe limitation is placed on such an attempt in thatif the pixel electrode overlaps the thin film transistor or wiring, acapacity is generated therebetween.

[0081] The present embodiment provides a configuration which reduces theproblem of generation of a capacity.

[0082]FIGS. 4A through 4C show steps of producing the configurationaccording to the present embodiment. The steps shown in FIGS. 4A and 4Bare the same as those in FIGS. 3A and 3B.

[0083] First, a masking film 115 made of aluminum is formed as shown inFIG. 4A. An anodic oxide film indicated by 301 is formed on the surfaceof the masking film 115.

[0084] Further, a third layer insulation film 116 is formed as shown inFIG. 4B. The layer insulation film 116 is formed from a resin material.

[0085] A pixel electrode 117 is then formed using ITO as shown in FIG.4C. The pixel electrode 117 is overlaid on the thin film transistor.This maximizes the aperture ratio of the pixel.

[0086] With the configuration as shown in FIG. 4C, layer insulationfilms 114 and 116 can be formed from a resin material having a smallrelative dielectric constant (as compared to a silicon oxide film orsilicon nitride film) with an increased thickness. This makes itpossible to reduce the problem of a capacity as described above.

[0087] Further, the area of the pixel electrode can be increased toobtain a larger aperture ratio for the pixel.

[0088] Although a top gate type is employed for a thin film transistorin the foregoing embodiments, in this embodiment 4 is described a methodfor manufacturing a bottom gate type thin film transistor in which agate electrode is closer to a substrate than an active layer is.

[0089] The manufacturing steps in accordance with this embodiment 4 areshown in FIGS. 5(A) to 5(D). First, as shown in FIG. 5(A), a siliconoxide film 202 as a base film is formed on a glass substrate 201 bysputtering. Then, a gate electrode 203 is formed from aluminum.

[0090] In this gate electrode, scandium is contained in aluminum at 0.18weight %. Concentration of other impurities should be made as low aspossible. The foregoing is for suppressing formation of protrusioncalled hillock or whisker formed due to extraordinary growth of aluminumin the subsequent step.

[0091] Then, a silicon oxide film 204 functioning as a gate insulatingfilm is formed to a thickness of 500A by plasma CVD.

[0092] Then, an amorphous silicon film (to become a crystalline siliconfilm 205 later) not shown in the drawings is formed by plasma CVD as astarting film for forming an active layer of a thin film transistor. Lowpressure thermal CVD may be used instead of plasma CVD.

[0093] Then, by a laser light irradiation, the amorphous silicon filmnot shown in the drawings is crystallized. A crystalline silicon film205 is then obtained. Thus, a structure shown in FIG. 5(A) is obtained.

[0094] After a structure shown in FIG. 5(A) is obtained, an active layer206 is formed by conducting a patterning.

[0095] Then, a silicon nitride film not shown in the drawings is formed,and is shaped into a mask pattern 207 made of the silicon nitride film,by irradiating. a light thereto from a rear surface side of thesubstrate using the gate electrode.

[0096] The mask pattern 207 is formed as follows.

[0097] At first, a resist mask pattern is formed by light irradiationfrom a rear surface side of the substrate 201 using the gate electrodepattern. Further, the resist mask pattern is retreated by ashing. Apattern designated by a reference numeral 207 is obtained by patterningthe silicon nitride film using the retreated resist mask pattern notshown in the drawings. Thus, the structure shown in FIG. 5(B) isobtained.

[0098] Then, an impurity doping is conducted using the mask pattern 207.For example, P(phosphorus) is used as a dopant, and plasma doping isused as a doping method.

[0099] In this step, regions 208 and 209 are doped with P. A region 210is not doped with P.

[0100] After completion of the doping, a laser light irradiation isconducted from above to conduct activation of the doped regions and toconduct annealing of damages caused due to impact of the dopant ions.

[0101] Thus, as shown in FIG. 5(C), a region 208 is formed as a sourceregion. Also, a region 209 is formed as a drain region. Also, a region210 is formed as a channel region.

[0102] Then, a silicon nitride film is formed as a first interlayerinsulating film 211 to a thickness of 2000 Å by plasma CVD.

[0103] A silicon oxide film, silicon oxinitride film, or a multilayerfilm comprising a silicon oxide film and a silicon nitride film (any oneof them can be formed on the other) can be used instead of the siliconnitride single film, as the first interlayer insulating film usedherein.

[0104] Then, a contact hole is formed for the source region 208 in thefirst interlayer insulating film 211, and a source electrode is formedto provide a contact to the source region 208. Thus, the structure shownin FIG. 5(C) is obtained.

[0105] Then, as shown in FIG. 5(D), a second interlayer insulating film213 having a flat surface is formed from a transparent polyimide resinor acrylic resin. For example, a spin coating can be employed as a filmformation method.

[0106] Then, a chromium film is formed on the second interlayerinsulating film 213, and is patterned to form a light-shielding film 214which serves as both a light-shielding film and a black matrix for athin film transistor. Then, a third interlayer insulating film 215 isformed from the same resin material film as the second interlayerinsulating film 213.

[0107] A contact hole which reaches the drain region 209 is formed inthe first to third interlayer insulating films 211, 213, 215. Then, ITO(indium tin oxide) film is formed on a surface of the third interlayerinsulating film 215, and is patterned into a pixel electrode 216.

[0108] A thin film transistor shown in FIG. 5(D) is completed throughthe foregoing steps.

[0109] Using the invention disclosed in this specification, an effectivemasking film can be provided in a configuration of a pixel of an activematrix display, and an active matrix display having high performance canbe configured. The invention disclosed in this specification isapplicable not only to active matrix liquid crystal displays but also toEL type displays and the like of the active matrix type.

[0110] While particular embodiments of the present invention have beenshown and described, it will be obvious to those skilled in the art thatchanges and modifications may be made without departing from thisinvention in its broader aspects and, therefore, the appended claims areto encompass within their scope all such changes and modifications asfall within the true spirit and scope of this invention.

1. An active matrix electro-luminescent display comprising: a thin filmtransistor provided over a substrate; a first insulating film comprisingan organic resin film provided over said thin film transistor to providea leveled upper surface over said thin film transistor; a secondinsulating film comprising silicon nitride over said first insulatingfilm; and a pixel electrode provided over said second insulating film.2. An active matrix electro-luminescent display comprising: a thin filmtransistor provided over a substrate; a first insulating film comprisingsilicon oxide provided over said thin film transistor; a secondinsulating film comprising an organic resin film provided over saidfirst insulating film to provide a leveled upper surface over said thinfilm transistor; a third insulating film comprising silicon nitride oversaid second insulating film; and a pixel electrode provided over saidthird insulating film.
 3. An active matrix electro-luminescent displaycomprising: a thin film transistor provided over a substrate; a firstinsulating film comprising silicon nitride provided over said thin filmtransistor; a second insulating film comprising an organic resin filmprovided over said first insulating film to provide a leveled uppersurface over said thin film transistor; a third insulating filmcomprising silicon nitride over said second insulating film; and a pixelelectrode provided over said third insulating film.
 4. An active matrixelectro-luminescent display comprising: a thin film transistor providedover a substrate; a first insulating film comprising a multi-layer filmcomprising a silicon oxide film and a silicon nitride film provided oversaid thin film transistor; a second insulating film comprising anorganic resin film provided over said first insulating film to provide aleveled upper surface over said thin film transistor; a third insulatingfilm comprising silicon nitride over said second insulating film; and apixel electrode provided over said third insulating film.
 5. An activematrix electro-luminescent display comprising: a thin film transistorprovided over a substrate and comprising a semiconductor film having asource region, a drain region, a channel region provided between saidsource region and said drain region; a first insulating film comprisingan organic resin film provided over said thin film transistor to providea leveled upper surface over said thin film transistor; a secondinsulating film comprising silicon nitride over said first insulatingfilm; and a pixel electrode provided over said second insulating filmand connected with one of said source region and said drain region. 6.An active matrix electro-luminescent display comprising: a thin filmtransistor provided over a substrate and comprising a semiconductor filmhaving a source region, a drain region, a channel region providedbetween said source region and said drain region; a first insulatingfilm comprising silicon oxide provided over said thin film transistor; asecond insulating film comprising an organic resin film provided oversaid first insulating film to provide a leveled upper surface over saidthin film transistor; a third insulating film comprising silicon nitrideover said second insulating film; and a pixel electrode provided oversaid third insulating film and connected with one of said source regionand said drain region.
 7. An active matrix electro-luminescent displaycomprising: a thin film transistor provided over a substrate andcomprising a semiconductor film having a source region, a drain region,a channel region provided between said source region and said drainregion; a first insulating film comprising silicon nitride provided oversaid thin film transistor; a second insulating film comprising anorganic resin film provided over said first insulating film to provide aleveled upper surface over said thin film transistor; a third insulatingfilm comprising silicon nitride over said second insulating film; and apixel electrode provided over said third insulating film and connectedwith one of said source region and said drain region.
 8. An activematrix electro-luminescent display comprising: a thin film transistorprovided over a substrate and comprising a semiconductor film having asource region, a drain region, a channel region provided between saidsource region and said drain region; a first insulating film comprisinga multi-layer film comprising a silicon oxide film and a silicon nitridefilm provided over said thin film transistor; a second insulating filmcomprising an organic resin film provided over said first insulatingfilm to provide a leveled upper surface over said thin film transistor;a third insulating film comprising silicon nitride over said secondinsulating film; and a pixel electrode provided over said thirdinsulating film and connected with one of said source region and saiddrain region.
 9. An active matrix electro-luminescent displaycomprising: a thin film transistor provided over a substrate; a firstinsulating film comprising an organic resin film provided over said thinfilm transistor to provide a leveled upper surface over said thin filmtransistor; a second insulating film comprising nitride over said firstinsulating film; and a pixel electrode provided over said secondinsulating film.
 10. An active matrix electro-luminescent displaycomprising: a thin film transistor provided over a substrate; a firstinsulating film comprising silicon oxide provided over said thin filmtransistor; a second insulating film comprising an organic resin filmprovided over said first insulating film to provide a leveled uppersurface over said thin film transistor; a third insulating filmcomprising nitride over said second insulating film; and a pixelelectrode provided over said third insulating film.
 11. An active matrixelectro-luminescent display comprising: a thin film transistor providedover a substrate; a first insulating film comprising silicon nitrideprovided over said thin film transistor; a second insulating filmcomprising an organic resin film provided over said first insulatingfilm to provide a leveled upper surface over said thin film transistor;a third insulating film comprising nitride over said second insulatingfilm; and a pixel electrode provided over said third insulating film.12. An active matrix electro-luminescent display comprising: a thin filmtransistor provided over a substrate; a first insulating film comprisinga multi-layer film comprising a silicon oxide film and a silicon nitridefilm provided over said thin film transistor; a second insulating filmcomprising an organic resin film provided over said first insulatingfilm to provide a leveled upper surface over said thin film transistor;a third insulating film comprising nitride over said second insulatingfilm; and a pixel electrode provided over said third insulating film.13. An active matrix electro-luminescent display according to claim 1,wherein said organic film comprises polyimide resin or acrylic resin.14. An active matrix electro-luminescent display according to claim 2,wherein said organic film comprises polyimide resin or acrylic resin.15. An active matrix electro-luminescent display according to claim 3,wherein said organic film comprises polyimide resin or acrylic resin.16. An active matrix electro-luminescent display according to claim 4,wherein said organic film comprises polyimide resin or acrylic resin.17. An active matrix electro-luminescent display according to claim 5,wherein said organic film comprises polyimide resin or acrylic resin.18. An active matrix electro-luminescent display according to claim 6,wherein said transparent organic film comprises polyimide resin oracrylic resin.
 19. An active matrix electro-luminescent displayaccording to claim 7, wherein said organic film comprises polyimideresin or acrylic resin.
 20. An active matrix electro-luminescent displayaccording to claim 8, wherein said organic film comprises polyimideresin or acrylic resin.
 21. An active matrix electro-luminescent displayaccording to claim 9, wherein said organic film comprises polyimideresin or acrylic resin.
 22. An active matrix electro-luminescent displayaccording to claim 10, wherein said organic film comprises polyimideresin or acrylic resin.
 23. An active matrix electro-luminescent displayaccording to claim 11, wherein said organic film comprises polyimideresin or acrylic resin.
 24. An active matrix electro-luminescent displayaccording to claim 12, wherein said organic film comprises polyimideresin or acrylic resin.
 25. An active matrix electro-luminescent displayaccording to claim 1, wherein said pixel electrode comprises ITO.
 26. Anactive matrix electro-luminescent display according to claim 2, whereinsaid pixel electrode comprises ITO.
 27. An active matrixelectro-luminescent display according to claim 3, wherein said pixelelectrode comprises ITO.
 28. An active matrix electro-luminescentdisplay according to claim 4, wherein said pixel electrode comprisesITO.
 29. An active matrix electro-luminescent display according to claim5, wherein said pixel electrode comprises ITO.
 30. An active matrixelectro-luminescent display according to claim 6, wherein said pixelelectrode comprises ITO.
 31. An active matrix electro-luminescentdisplay according to claim 7, wherein said pixel electrode comprisesITO.
 32. An active matrix electro-luminescent display according to claim8, wherein said pixel electrode comprises ITO.
 33. An active matrixelectro-luminescent display according to claim 9, wherein said pixelelectrode comprises ITO.
 34. An active matrix electro-luminescentdisplay according to claim 10, wherein said pixel electrode comprisesITO.
 35. An active matrix electro-luminescent display according to claim11, wherein said pixel electrode comprises ITO.
 36. An active matrixelectro-luminescent display according to claim 12, wherein said pixelelectrode comprises ITO.